GPU Formal Verification Engineer

AMD - Advanced Micro Devices

Cambridge, United Kingdom

THE ROLE:

AMD is looking for a Staff/Sr. Staff Engineer, Formal Verification leader passionate about driving the cutting-edge formal verification techniques for AMD’s next generation graphics IP design. The ideal candidate will have proven experience in driving cutting-edge formal verification methodology to achieve industry leading verification quality and productivity under tight schedule. In this role the candidate will work with architecture team, design team and central formal verification team to define our formal verification roadmap, strategy, methodology, infrastructure and expand formal verification adoption through project execution. The candidate will be the primary point of contact for all GFXIP formal verification practice.

KEY RESPONSIBILITIES:

Define long-term strategy for formal verification expansion and steer the technical roadmap
Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc.
Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge
Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design
Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD

PREFERRED EXPERIENCE:

In-depth knowledge in formal verification algorithms, engines and use cases
Proven expertise in system Verilog assertion and abstract model development
Expert user of formal verification tool from both academy and EDA vendors(JasperGold, VC formal, Murphi, theorem prover)
Proven track record of delivering high quality verification under tight schedule for modern, large scale processor design like CPU, GPU or AI processor. Comprehensive knowledge of computer architecture and graphics pipeline
Proven expertise in developing formal verification infrastructure for FPV, DPV, SEV and other use cases is strongly preferred