Senior Design Verification Engineer

AMD - Advanced Micro Devices

Dublin, Ireland

THE ROLE:

We are seeking a highly skilled and motivated senior Design Verification Engineer to join our Analog and Digital-RF team at AMD. This is an exciting opportunity to join the innovative and multi-award winning team that has developed the RF data converter sub-system, including direct-RF digital signal processing, around which Zynq® Ultrascale+™ RFSoC is built. As a Design Verification Engineer, you will play a critical role in ensuring the quality and reliability of our cutting-edge semiconductor designs. You will collaborate closely with cross-functional teams to develop and execute comprehensive verification plans, leveraging state-of-the-art tools and methodologies to validate complex designs.

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

Develop and execute verification plans for complex semiconductor designs.
Design and implement advanced verification environments using industry-standard methodologies such as UVM (Universal Verification Methodology).
Write and debug SystemVerilog and UVM-based testbenches to verify design functionality and performance.
Develop and implement coverage-driven verification strategies to ensure comprehensive validation of design features.
Collaborate with design teams to understand design specifications and identify potential areas of improvement.
Analyze and debug failures to root cause using simulation, debug tools, and other diagnostic techniques.
Work closely with cross-functional teams including design, architecture, and software teams to ensure seamless integration and validation of designs.
Drive continuous improvement in verification methodologies, tools, processes and AI initiatives to enhance productivity and efficiency.

PREFERRED EXPERIENCE:

Experience in semiconductor design verification.
Strong proficiency in SystemVerilog and UVM methodology.
Experience with verification tools such as VCS, Questa, and Synopsys tools.
Experience with scripting languages such as Python, Perl, or TCL is a plus.
Excellent problem-solving skills with a strong attention to detail.
Strong communication and collaboration skills, with the ability to work effectively in a team environment.
Proven track record of delivering high-quality verification results on schedule.