CPU Architecture and RTL Design Lead Engineer

AMD - Advanced Micro Devices

Cork, Ireland

THE ROLE:

As a CPU Core CPU Architect/RTL Design Engineer, you will have an outstanding opportunity to drive the definition, implementation (RTL design), and integration of Clocking, Reset and Power in AMD’s next-generation core. You will work as part of an experienced, skilled, and motivated engineering team with a track record of success. You will help make AMD’s ambitious future CPU roadmap a reality while working in a highly collaborative environment at the cutting edge of technology.

KEY RESPONSIBLITIES:

Collaborate with a dedicated team of engineers to define and implement CPL microarchitecture for AMD CPUs.
Reliably deliver a design from concept through tapeout by innovating through complex and challenging requirements.
Drive design closure gaining experience with Static Timing, CDC/Gate CDC, and Static Power analysis.
Identify customer challenges and insert a compelling AMD value proposition to address challenges.
Make technical contributions and innovations that enable high performance, high frequency, and power efficiency on caches, fabrics, and interfaces of our server, desktop, and laptop CPUs.

PREFERRED EXPERIENCE:

Proficiency with Verilog HDL, Clock/Power Domain Crossing concepts, and Power Management concepts.
Understanding of modern CPU architecture - prior experience designing shared cache or last level cache and related IPs a plus.
Eagerness to learn and grow as a CPL design engineer.
Collaborate effectively towards the success of the project by working closely with logic design, physical design and verification teamates across the wider organization.
Demonstrate a responsive track record of engaging with a diverse set of teams and across a broad set of technical areas to facilitate design delivery.