Staff Design Verification Engineer

AMD - Advanced Micro Devices

Cambridge, United Kingdom

THE ROLE:

As part of AMD's networking silicon team, you will work on next-generation network processors and SmartNIC technologies, driving verification of complex packet-processing, control-plane, and system-level features. You will leverage automation, data-driven methodologies, and AI-assisted engineering tools to improve verification productivity, accelerate debug, enhance coverage analysis, and help deliver high-quality silicon.

This role provides the opportunity to work at the intersection of networking silicon, advanced verification methodologies, and AI-driven engineering productivity. You will help shape how modern verification teams leverage automation and intelligent workflows to improve quality, scalability, and time-to-market.

THE PERSON:

You have a passion for modern, complex processor architectures, digital design, and verification. You are a collaborative team player with excellent communication skills and experience working with engineers across multiple sites and time zones. You possess strong analytical and problem-solving skills, are eager to learn, and are motivated to tackle challenging technical problems.

KEY RESPONSIBILITIES:

Collaborate with architects, hardware engineers, and firmware engineers to understand new features and define verification requirements;
Build comprehensive verification plans that account for interactions across hardware, firmware, software, and system-level use cases;
Develop directed and constrained-random tests, verification environments, and automation infrastructure;
Estimate verification effort and identify required enhancements to verification environments and methodologies;
Debug test failures to determine root cause and work with RTL and firmware engineers to resolve design defects;
Review and drive functional and code coverage closure through targeted test development and analysis;
Contribute to advanced verification methodologies spanning simulation, emulation, and data-driven analytics to accelerate silicon quality and release readiness;
Develop automation solutions and leverage AI-assisted workflows to improve verification efficiency, debug productivity, coverage analysis, and test development;
Drive continuous improvement of verification processes through scripting, automation, and emerging AI technologies.

PREFERRED EXPERIENCE:

Proficient in IP-level ASIC verification;
Strong experience with UVM testbenches and SystemVerilog;
Proficient in debugging RTL and firmware using industry-standard simulation tools;
Experience with Verilog, SystemVerilog, C, and C++;
Experience developing UVM-based verification frameworks, reusable components, and verification methodologies;
Experience with Python, Perl, Shell, Makefiles, or similar scripting languages;
Familiarity with data analytics, workflow automation, and AI-enabled engineering practices;
Experience applying AI/ML-assisted tools to verification, debug, coverage closure, or engineering productivity workflows;
Experience using Python-based frameworks and AI-assisted development tools to improve engineering efficiency;
Good understanding of SystemC and TLM; related experience is a plus;
Exposure to networking, packet processing, Ethernet, SmartNIC, or networking processor architectures is highly desirable;
Exposure to leadership and mentorship is an asset.